It takes a finite period of time for a bipolar transistor to become nonconductive, i.e. turned off, when its base current is discontinued. The period of time it takes to drop from 90% to 10% of maximum conductivity I refer to herein as fall time. In power transistors, fall time is ordinarily inherently long enough in a discrete device. If the power transistor is incorporated in a monolithic integrated circuit, parasitic effects can increase fall time, i.e. delay in turn-off, even more.
In an H-switch, if one diagonal pair of power transistors in the circuit is not turned off before the other diagonal pair is turned on, the results can be damaging to the integrated circuit, as will hereinafter be more fully described. I have noted that if the H-switch is made as a PN junction-isolated monolithic integrated circuit, one transistor in each diagonal pair can form a parasitic driver transistor for both power transistors of the other diagonal pair by means of substrate injection. The substrate injection delays turn-off of both power transistors in the other leg. If the delay is long enough, both diagonal pairs can be conductive at the same time. In such event, a short circuit to ground is provided through one transistor of each diagonal pair. Such a short would produce failure of the circuit.
To protect such a circuit against failure, one must insure that the circuit operates with sufficient switching delay to accommodate the maximum parasitic action that will occur, no matter how infrequent it is expected. A better way is to operate the circuit without the switching delay but to include additional circuitry to protect against failure when the parasitic action occurs. I achieve such protection by means of a PN junction-isolated monolithic circuit of unique integrated geometry.